Fabrication of semiconductor devices involves multi-step processes of forming features on a semiconductor substrate. Steps can include material growth, patterning, doping, deposition, etching, metallization, planarization, and so forth. Techniques herein relate to etching features in semiconductor substrates. Such features can include trenches, vias, through-silicon-vias, and other patterns etched in wafers or other substrates. Etching of substrates typically involves using a plasma processing system. Plasma processing systems create a plasma above a substrate by supplying power to a process gas. Various species from the plasma can then be used to etch features into a substrate.
One challenge with etching features—especially deep (high aspect ratio) features—is controlling and limiting a bowing effect that enlarges trench diameters or widths, such as bowing in an oxide layer of a deep trench capacitor or other feature device. A typical example of bowing is shown in FIG. 1. Bowing is an enlargement of a hole or trench diameter (hole width), for example, in an upper part of an oxide layer of a given hole feature such as a deep trench.
Ideally, for many etch processes, the diameter of the trench should remain constant for an entire depth of the trench. However, diameter consistency of trenches is difficult to achieve. Accordingly, bowing becomes undesirable and a significant challenge for etching, including etching of high aspect ratio deep trench masks. A consequence of an enlarged bowing diameter is that adjacent trenches can merge leading to electrical shorts. An example of trench merging can be seen in FIG. 2. Merged trenches can also cause irregular flow of etchants along the trenches and can adversely affect ion scattering of ion-based etching, leading to defects such as “side-pockets” in deep trenches during the Si (silicon) substrate etch process (which can follow a mask open process).